Compact static memory cell with non-volatile storage capability

Static information storage and retrieval – Systems using particular element – Flip-flop

Reexamination Certificate

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C365S148000

Reexamination Certificate

active

11288883

ABSTRACT:
A static random access memory (SRAM) cell includes a SRAM circuit and a programmable resistor connected to a storage node of the SRAM circuit. The SRAM circuit can be any type of SRAM circuit, such as a 3T, negative differential resistance (NDR) transistor-based circuit, or a 6T (conventional SRAM) circuit. The programmable resistor can be formed in a metal layer above the SRAM circuit to minimize the area requirements for the memory cell. Just before shutdown of the SRAM cell, the resistance state of the programmable resistor is changed (if necessary) based on the data value stored at the storage node. The programmable resistor provides a non-volatile indication of the stored data value at the time of power off. Then, when power is restored to the SRAM cell, a data value based on the resistance state of the programmable resistor is written back into the SRAM circuit.

REFERENCES:
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patent: 5732015 (1998-03-01), Kazerounian et al.
patent: 5812450 (1998-09-01), Sansbury et al.
patent: 6285586 (2001-09-01), Lung et al.
patent: 6512274 (2003-01-01), King et al.
patent: 6724655 (2004-04-01), King
patent: 7132350 (2006-11-01), Yeh et al.
patent: 2003/0179630 (2003-09-01), Choi
patent: 2004/0141363 (2004-07-01), Ohtsuka et al.

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