Compact multiplexer circuit

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Field-effect transistor

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Details

327407, 327408, 326112, H03K 1920

Patent

active

054283060

ABSTRACT:
A design approach for a tree structure multiplexer produces a compact circuit layout by reducing the required number of transistors. The multiplexer is used to perform a binary decode of the input signals to generate a single selection of one of a number of potential outputs. since the inputs undergo a binary decode, the number of outputs is equal to 2.sup.x, where x is the number of inputs.

REFERENCES:
patent: 4468574 (1984-08-01), Engeler et al.
patent: 4507574 (1985-03-01), Seki et al.

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