Electrical computers and digital data processing systems: input/ – Intrasystem connection – Protocol
Reexamination Certificate
1998-05-26
2001-07-24
Ray, Gopal C. (Department: 2181)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Protocol
C711S100000
Reexamination Certificate
active
06266725
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to a communications protocol for asynchronous memory cards. It can be applied in particular to the testing, as well as to the resetting, of such memory cards.
BACKGROUND OF THE INVENTION
The term “memory card” is understood to mean a card comprising at least one integrated circuit chip embedded in the material of the card and mounted on a flush connector meeting the ISO standard 7816. This connector has five to six standardized contacts. These contacts are the contacts for the electrical ground GND, the logic supply VCC (+3 or +5 volts), the resetting of the card RST, the clock signal CLK, the data input/output I/O and, for certain cards, the programming voltage Vpp (10 to 21 volts). These contacts enable serial transmission on the line I/O. This transmission is more particularly set forth in part 7816-3 of the standard. Variants to this standard exist, especially with cards using I2C bus memories. The transmission bit rate is currently 9,600 to 19,200 bps. However, certain cards have bit rates of 115,200 bps and higher.
A distinction can be made between two major classes of memory cards, one using synchronous transmission and the other using asynchronous transmission. Synchronous transmission is generally that of simple or secured memory cards. The rate of input/output of the bits is directly set by the clock signal CLK with sequential access in the rising order of their addresses.
The asynchronous memory cards are mostly microprocessor cards. The transmission is done by a byte or block of bytes on the input/output line I/O. It is for the host system of the memory card to monitor this line to detect the reception of a message transmitted by the card. It is a general characteristic of asynchronous transmission, whatever the protocol used, that it meets the standard 7816 or other standards.
The term “host system” is understood to mean the card reader of a sales point or money dispenser, portable telephone, television decoder or any other system that communicates with the memory card presented to it. To enable communications between a host system and a memory card which, in practice, may come from various manufacturers and issuing parties, the protocols incorporate the dispatching of an ATR (Answer to Reset) message by the card in response to a resetting signal (RST signal activated). The contents of the ATR message identify the card with respect to type (simple memory, microprocessor memory or the like), its protocol, whether or not a programming voltage Vpp is needed, with the value of this programming voltage as the case may be (10, 15, 21 volts). The contents may also include any information by which the host system can configure itself appropriately so as to communicate with the card that is presented to it.
The asynchronous transmission protocols are thus well suited to applications of memory cards where a host system has to deal with only one memory card at a given time, namely the card that is presented to it. This is the case for applications such as payment, telecommunications, subscriber television, customer loyalty cards, etc.
When it comes to the testing of memory cards coming off the production line or that have been subjected to the customization carried out on cards that this test has deemed to be suitable, the protocols prove to be highly disadvantageous. Indeed, it is not possible to process several cards in parallel, since the host system is captive to each card which is the master of the communication once it has transmitted its response. The host system must, therefore, scrutinize the corresponding line I/O for each character to be received. Since in testing a large quantity of information has to be transmitted between the host system and the card, this process may be very slow.
This is true not only for the testing, but also for the customizing of the cards. Customizing includes programming of a flow of data elements with a few hundreds or thousands of bytes, most of which correspond to a trunk common to all the cards, with a minority of data elements, whose number can be estimated at some tens to some hundreds of bytes, being specific to each card. The testing and customization of a card may thus take from ten seconds to several tens of seconds. The host system, which is a testing or programming system, can therefore process only one card after another. This serial processing results in an excessively lengthy time for the testing and customization of a batch of cards, making this end-of-manufacturing step highly penalizing from the viewpoint of manufacturing times, even if several testers and programmers are provided.
SUMMARY OF THE INVENTION
It is an object of the invention, therefore, to reduce the time taken for the testing and customization of memory cards with asynchronous transmission protocols.
On the basis of the observation that, in the case of testing or customization, the host system (the tester or programmer) knows the characteristics of the card that it processes, means has been sought to make use of this knowledge to enable the simultaneous parallel processing of the cards.
The means have been found, in accordance with the invention, in a communications method according to which instead of scrutinizing the line I/O pending a response, the host system sends the card a request for a response. After a previously received control instruction has been executed, it is the card that will scrutinize the line I/O pending this request for a response. When it has detected this request for a response, it prepares and sends its response.
The host system knows what time is needed to carry out the instruction and sends its request for a response when this time has elapsed, and then positions itself (in a sampling state) to receive the message. In the testing mode, this enables the host system to check the periods of time taken to execute the control instructions (resetting, reading, programming, comparison or the like). In programming mode, this enables it to have an optimum programming duration. In being made the master at the time when the message of the response is dispatched, the host system is enabled to process several cards simultaneously, in parallel.
The method of communications according to the invention is based on the asynchronous transmission protocol implemented by the card by means of an operational excecutable sub-program, stored in memory in the card, to make a modified executable sub-program integrating the response request instruction to be received before any dispatch on the line I/O. This modified executable sub-program is also stored in memory in the card. It is possible to plan that, at the outset, and depending on manufacture, the active sub-program will be the modified sub-program used for the testing. If the card is found to be the right card, the step of customizing the card provides for the invalidating of this modified executable sub-program so that its place is taken by the first one which is the operational sub-program. This invalidation can be done by the blowing of access fuses, for example, or by the recording of any non-degradable data element (by means of memory cells for example). In one variant, the modified executable sub-program is activated by a test mode signal for example, and then deactivated as above to make the operational executable sub-program active.
In other words, the invention therefore relates to a method of communications between a host system and a memory card with an asynchronous transmission protocol. A message from the card is sent out in response to a control instruction comprising a character or a sequence of several characters in a determined format. According to the invention, the protocol is modified so as to have the dispatch of the message or of each character of the message preceded by a detection by the card of a response request instruction (DR) sent out by the host system.
REFERENCES:
patent: 5327570 (1994-07-01), Foster et al.
patent: 5414835 (1995-05-01), Iijima
patent: 5473666 (1995-12-01), Szczebak, Jr. et al.
patent: 5533204 (1
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Galanthay Theodore E.
Ray Gopal C.
STMicroelectronics S.A.
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