Communication interface between two finite state machines operat

Details Communication interface between two finite state machines operat Communication interface between two finite state machines operat

1998-03-27

1999-12-21

Heckler, Thomas M.

Electrical computers and digital processing systems: support

Clock control of data processing system, component, or data...

709233, G06F 1338

Patent

active

060063408

ABSTRACT:
A system for creating a communication interface between a first finite state machine, operating in accordance with a write side clock in a write side clock domain, the first finite state machine operating to generate a Request signal for a transaction and for requesting the transfer of information associated with the Request signal, and a second finite state machine, operating in accordance with a read side clock in a read side clock domain at a different frequency than the write side clock, comprising: a register file; a first interface to the first finite state machine; a second interface to the second finite state machine; and logic for loading in accordance with the write side clock, a communication queue of the information into the register file in accordance with the Request signals from the first finite state machine, for reading by the second finite state machine via the second interface in accordance with the read side clock.

REFERENCES:
patent: 4463443 (1984-07-01), Frankel et al.
patent: 5237660 (1993-08-01), Weber et al.
patent: 5712992 (1998-01-01), Hawkins et al.
patent: 5717954 (1998-02-01), Grieff et al.

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