Communication device with multi-line message memory access...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output access regulation

Reexamination Certificate

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Details

C710S062000, C379S067100, C379S085000, C379S088130, C379S088220

Reexamination Certificate

active

06865625

ABSTRACT:
A communication device (100) includes a processor (130) for processing communications on more than one communication line and a multi-line message memory (200) including a memory storage location for each of the one or more communication lines. The communication device (100) operates using a message manager application (155) programmed to: operate using a first communication line as an active communication line, switch the active communication line to a second communication line, access a second memory storage location associated with the second communication line within the multi-line message memory, and switch the active communication line to the first communication line.

REFERENCES:
patent: 5014296 (1991-05-01), Saigano
patent: 5497508 (1996-03-01), George
patent: 5524138 (1996-06-01), Kawano
patent: 6473496 (2002-10-01), Mohageg
patent: 20020127999 (2002-09-01), Brown

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