Communication device, multiple bus control device and LSI...

Details Communication device, multiple bus control device and LSI... Communication device, multiple bus control device and LSI...

1999-12-07

2002-12-10

Wong, Peter (Department: 2181)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C710S240000, C710S241000, C710S242000, C710S243000

Reexamination Certificate

active

06493784

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a communication device provided with a multiple bus having plural channels via each of which a signal is transmitted and plural modules for sending/receiving a signal via the multiple bus, a multiple bus control device for arbitrating requests for communication between the plural modules via the multiple bus and an LSI for controlling the multiple bus in which the multiple bus control device is realized.
2. Description of the Related Art
Recently, a data processing rate by LSI has been rapidly accelerated by the progress of semiconductor integration technology. As the data processing rate is accelerated, the enhancement of signal transmission ability is demanded for a wiring board packaging a semiconductor integrated circuit.
Particularly in recent years, so-called parallel processing architecture provided with plural high speed CPU chips is adopted in a server-type system equivalent to a high-order device of a personal computer. The classification of the parallel processing architecture is described on pages 6 to 13 of “Parallel computers” written by DR. Hideharu Amano and published by Shokodo for example. According to this book, if a system is composed of plural modules for executing data processing such as CPU, a method of connecting modules is classified into a type of connection via a bus, a type of connection via a switch and a type of connection via a network. Of these, the type of connection via a bus is not suitable for the connection of multiple modules, however, the type has a merit that the structure is simple, compared with other types, the quantity of hardware is small and the type is excellent in expandability. The type of connection via a bus is widely used in a commercial computer including a personal computer and computer application products.
In connection via a bus, communication performance proportional to the processing rate and the number of connected modules is demanded. Many multiple bus systems each of which enables enhancing communication performance by multiplexing a bus itself are proposed. In the case of a parallel processing system, as plural modules can access to each bus, means to solve access contention is required. For the above means, for example, Japanese Published Unexamined Patent Application No. Hei 5-282242 is disclosed. In the above application, an bus arbiter that arbitrates access contention is provided and each bus master outputs a request for transmission to the bus arbiter. In the meantime, the bus arbiter first retrieves an idle bus signal line, determines a bus master which is permitted to use the bus signal line and sends a signal showing that the use of the bus signal line is permitted or unpermitted to each bus master.
A concrete example of the configuration of a bus arbiter in a multiple bus system is described on pages 295 to 297 of the second edition “Computer Architecture Design and Performance” written by B. Wilkinson, translated by Yoshizo Takahashi and published by Prentise Hall/Toppan for example. Referring to
FIG. 1
, the configuration of a bus arbiter will be described below.
FIG. 1
shows an example of a conventional type multiple bus control device.
In a multiple bus, there occur not only bus contention but access contention to a communication destination such as a memory. To solve the above problem, an arbiter having two steps as shown in
FIG. 1
is provided. A first step is an arbiter provided to a communication destination (memory arbiters
301
a
and
301
b
in this example) and hereby, it is determined that one of plural CPUs
303
a
, . . . ,
303
z
has an access right to access to each memory
302
a
and
302
b
. The memory arbiters are required by the number of memories. A second step is a normal bus arbiter
304
and the bus arbiter
304
gives a right to use a bus not to CPU but to the output of each memory arbiter
301
a
and
301
b
. Finally, CPU having a right to use each memory and each bus is determined.
As multiple connectors and wiring are required when modules in a parallel processing system are connected, wiring has been multilayered and micronized to enhance communication performance and the density of wiring. However, the multilayering and micronization of wiring are approaching a limit because of the delay of a signal and the distortion of a transmitted waveform caused by capacity between wiring and the resistance of wiring. Electromagnetic interference (EMI) caused by accelerating operating speed is also a serious problem.
As described above, the throughput of a data processor is often limited by the transmission capability of a bus on a wiring board. Then, it is examined to overcome the limit of an electric bus that in-system optical connection technology called optical interconnection is used. For optical interconnection technology, various embodiments are proposed depending upon the contents of the configuration of a system as disclosed on pages 201 and 202 of a lecture by Mr. Uchida in the ninth Circuit Mounting Lecture Meeting 15C01, on pages 81 to 86 of “Packaging Technology for Optical Interconnects”, IEEE Tokyo 1994, No. 33 by Mr. H. Tomimuro et al. and on pages 52 to 55 of “Electronics” the April number written by Mr. Wada and published in 1993. The optical interconnection technology has merits that high frequency operation exceeding that in electric interconnection technology is enabled, moreover electromagnetic interference can be reduced, transmission bandwidth can be expanded by multiplexing using wavelength, amplitude and others, and simultaneous two-way communication is enabled.
Particularly, as spatial optical transmission technology enables simultaneous communication among multiple ports and does not require the physical connection of bus signal lines, it is matched with the above multiple bus system. Technology similar to the above technology is disclosed in Japanese Published Unexamined Patent Application No. Hei 4-305757 for example. The above application relates to technology for connecting plural modules such as CPU, a memory and an I/O device not by spatial optical transmission but by radio transmission and radio transmission has merits that simultaneous communication among multiple ports is enabled and the physical connection of bus signal lines is not required similarly to spatial optical transmission, compared with an electric bus. The technology disclosed in Japanese Published Unexamined Patent Application No. Hei 4-305757 relates to a system for implementing communication among modules according to a spread spectrum system and a bus arbiter is provided with a function for connecting arbitrary two modules.
Similarly, technology for implementing simultaneous broadcast communication among multiple ports by spatial optical transmission is disclosed in Japanese Published Unexamined Patent Application No. Hei 10-123374. The above technology realizes optical communication between ports installed on the end face of a flat optical waveguide and realizes a broadcast by branching incident signal light by refracting it and transmitting it on the opposite end face.
FIG. 2
is a schematic drawing showing a state of the transmission of an optical signal provided with a directional propagation property.
As shown in
FIG. 2
, an optical signal is provided with a directional propagation property and incident light is transmitted only to a port on the opposite end face.
FIG. 3
equivalently represents the above state by an electric circuit. A simultaneous communication function in reverse directions is implemented owing to a directional propagation property by setting different channels to reverse directions using the same wavelength, the same communication zone and others which enable only setting one channel in case a two-way propagation property.
In such a conventional type multiple bus system as disclosed in the above Japanese Published Unexamined Patent Application No. Hei 5-282242, multiplexing one-to-one communication between modules or access control to implement broadcast communicatio

Affiliated with

Also associated with

Rating

Communication device, multiple bus control device and LSI... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Communication device, multiple bus control device and LSI..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Communication device, multiple bus control device and LSI... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2993771