Electrical computers and digital processing systems: multicomput – Computer conferencing – Cooperative computer processing
Reexamination Certificate
2006-12-19
2010-11-16
Hwang, Joon H (Department: 2447)
Electrical computers and digital processing systems: multicomput
Computer conferencing
Cooperative computer processing
C709S212000, C709S213000, C709S214000, C709S215000, C709S216000
Reexamination Certificate
active
07836129
ABSTRACT:
A mechanism is provided for communication between host systems using a queuing system and shared memories. Memory address spaces of the host systems are initialized such that endpoints may be accessible by root complexes across host systems. These memory address spaces may then be used to allow system images, and their corresponding applications, associated with these root complexes to communicate with the endpoints using a queuing system. Such a queuing system may comprise queue structures having doorbell structures for providing information about the queue entries in the queue structures. Queue elements may be generated and added to the queue structures, and the doorbell structure may be written to, in order to thereby inform an endpoint or root complex that queue elements are available for processing. DMA operations may be performed to retrieve the queue elements and the data corresponding to the queue elements.
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Freimuth Douglas M.
Recio Renato J.
Salzberg Claudia A.
Thurber Steven M.
Vargas Jacobo A.
Hwang Joon H
International Business Machines - Corporation
Lammes Francis
Means Jaren M
Toub Libby Z.
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