Electrical computers and digital processing systems: support – Clock control of data processing system – component – or data...
Reexamination Certificate
1999-03-29
2002-12-10
Butler, Dennis M. (Department: 2185)
Electrical computers and digital processing systems: support
Clock control of data processing system, component, or data...
C713S400000, C713S503000
Reexamination Certificate
active
06493832
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a communication apparatus suitable for use in a system which digitizes audio data and/or video data using an ATM communication technology or the like, encodes the digitized data in accordance with, for example, the MPEG system, converts the encoded data into packets of a transport stream of the MPEG system and transmits the packets through a predetermined network, requiring clock synchronization with the transmission side upon decoding in reception of the data packets.
In an application which uses digital sound and/or an image, a decoder must perform decoding in synchronism with an information generation source such as, for example, output data of an encoder or stored or recorded data in encoded form. If the decoder can control the information generation source, then it is possible to adjust the rate of data to be transmitted. In this instance, the decoder should rely only upon the timing of received data to decode the data and perform display of an image or reproduction of sound.
However, where the decoder does not have a controlling function for the information generation source, for example, when data are transmitted to the decoder through a network, since the information generation source and the decoder operate with system clock signals independent of each other, coding/transmission and reception/decoding/display and so forth are performed with the system clock signals of the information generation source and the decoder, respectively. If the system clock signals do not have a common clock signal to which they can refer to each other, then the system clock signals of the information generation source and the decoder exhibit a displacement in frequency. If the two clock signals are not in synchronism with each other, the information rates of data transmitted from the information generation source and data decoded by the decoder become different from each other, and as a result, a reception buffer of the decoder overflows or underflows. Consequently, data are lost, and therefore, for example, in regard to an image, it becomes necessary to re-display a frame.
One of methods for synchronizing the system clock signal of an information generation source and the system clock signal of a decoder with each other employs information representative of a time, that is, a time stamp.
In an MPEG transport stream, a PCR (Program Clock Reference) is used as a time stamp to establish synchronism. A concept of synchronization is illustrated in FIG.
1
.
A source clock of the information generation source has a counter which has a certain cycle, and a system clock signal operates the counter. The value of the counter is latched after each certain interval of time, although such interval need not be a fixed interval, and the latched value is transmitted to the decoder. This value is so-called time stamp, and the decoder uses this value to synchronize the system clock signal of its own with the system clock signal of the information generation source. Particularly, the count value held by the decoder and the received time stamp are compared with each other, and then the reception side system clock signal is controlled to increase or decrease in rate to synchronize the decoder with the information generation source based on a result of the comparison.
A construction of a phase comparison circuit provided for such synchronization on the reception side is shown in FIG.
2
. Referring to
FIG. 2
, the phase comparison circuit is generally denoted at
20
, and a time stamp received is inputted to the phase comparison circuit
20
, in which it is subtracted from a value of a counter
21
by a subtractor
22
in order to compare it with the value of the counter
21
. A difference obtained by the subtraction is inputted to a low-pass filter (LPF)
23
, and an output of the low-pass filter
23
is converted from a digital signal into an analog signal by a digital-to-analog converter not shown and used to control a voltage controlled oscillator (VCO)
24
.
An output of the VCO
24
is used as a system clock signal of the decoder, and the counter
21
is operated with the system clock signal, thereby forming a feedback loop.
Such a synchronization method as described above is employed by the MPEG-2 system layer (ISO/IEC 13818-1) and the ITU-T recommendations. In the MPEG-2, a system clock of 27 MHz is used for an encoder and a decoder. A system construction of a network which transmits data formed in accordance with the MPEG-2 is shown in FIG.
3
. Referring to
FIG. 3
, the information generation source is a coding apparatus such as an encoder
31
. However, the information generation source may alternatively be a storage apparatus which has stored encoded data in advance and can output the stored data.
Information generated by the encoder
31
is inputted to a system encoder
32
. The system encoder
32
performs addition of a time stamp to the information generated by the encoder
31
, conversion of the resulting information into packets and multiplexing of them to generate transport stream packets.
An MPEG-to-ATM conversion section
33
converts the transport stream into ATM cells and transmits the ATM cells to the reception side through a network
34
. Upon the transmission to the reception side, the ATM cells are influenced by various delay fluctuations in the network. Production of such delay fluctuations is hereinafter described in connection with ATM cells.
A time stamp which contains such delay fluctuations is first converted into a system packet by an ATM-to-MPEG conversion section
35
and then processed by a system decoder
36
so that a system clock signal of the decoder is reproduced from the time stamp. In the case of the MPEG, a system clock signal of 27 MHz is reproduced and inputted to the decoder. The data processed by the system decoder
36
are decoded by a decoder
37
.
The MPEG-2 system layer involves two streams, called as program stream and transport stream. The program stream is expected to be used in a system which is free from an error, such as a storage medium while the transport stream is expected to be used with a system which involves some error such as communication. In the program stream, a time stamp is called as an SCR (system clock reference) and is transmitted after an interval of at least 0.7 seconds or less. The SCR time stamp is included in a header of a program stream packet and is present only in packets which are used to transmit the SCR.
In a transport stream packet, a time stamp is called as a PCR (program clock reference) and is transmitted after an interval of at least 0.1 second or less. The PCR time stamp is included in a header of a transport stream packet and is present only in packets which are used to transmit the PCR.
Particularly, the PCR comprises 42 bits in total and includes two parts, of a program clock reference extension and of a program clock reference base. The former has 9 bits while the latter has 33 bits. The former counts from 0 to 299, and the latter is incremented by one with a carrier from the former. Where the system clock signal of 27 MHz in the MPEG-2 is used, a time for 24 hours can be counted in units of a 27 MHz clock by using the 42-bit counter. In other words, the PCR is considered to be a value (PCR value) of a PCR counter which is counted with a system clock signal.
As reference documents relating to the present invention, the following three documents are listed:
[1] M. Perkins and P. Skelly, “A Hardware MPEG Clock Recovery Experiment in the Presence of ATM Jitter”, ATM Forum contribution to the SAA sub-working group, 94-0434, May 1994;
[2] G. Franceschini, “Extension of the Adaptive Clock Method to Variable Bit Rate Streams”, ATM Forum contribution to the SAA sub-working group, 94-0321, May 1994; and
[3] ISO/IEC13818-1 (MPEG-2 Systems), “GENERIC CODING OF MOVING PICTURES AND ASSOCIATED AUDIO”, Recommendation H.222.0, ISO/IEC JTC/SC29/WG11 NO721rev, June, 1994.
The document [1] discloses trial production of hardware for synchron
Itakura Eisaburo
Matsumura Yo-ichi
Seto Hiroaki
Tahara Katsumi
Butler Dennis M.
Frommer William S.
Frommer & Lawrence & Haug LLP
Sony Corporation
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