Communicating between partitions in a statically partitioned...

Details Communicating between partitions in a statically partitioned... Communicating between partitions in a statically partitioned...

2011-02-01

2011-02-01

Nguyen, Than (Department: 2187)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C711S173000

Reexamination Certificate

active

07882327

ABSTRACT:
In one embodiment, a method comprises assigning a unique node number to each of a first plurality of nodes in a first partition of a system and a second plurality of nodes in a second partition of the system. A first memory address space spans first memory included in the first partition and a second memory address space spans second memory included in the second partition. The first memory address space and the second memory address space are generally logically distinct. The method further comprises programming a first address map in the first partition to map the first memory address space to node numbers, wherein the programming comprises mapping a first memory address range within the first memory address space to a first node number assigned to a first node of the second plurality of nodes in the second partition, whereby the first memory address range is mapped to the second partition.

REFERENCES:
patent: 6049808 (2000-04-01), Talluri et al.
patent: 6853382 (2005-02-01), Van Dyke et al.
patent: 2002/0184345 (2002-12-01), Masuyama et al.
patent: 2003/0131213 (2003-07-01), Shanahan et al.
patent: 2003/0233495 (2003-12-01), Moll et al.
patent: 2004/0054807 (2004-03-01), Harvey et al.
patent: 2004/0249970 (2004-12-01), Castro et al.

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