Common-mode shifting circuit for CML buffers

Details Common-mode shifting circuit for CML buffers Common-mode shifting circuit for CML buffers

2008-04-08

2008-04-08

Le, Don (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C326S026000

Reexamination Certificate

active

07355451

ABSTRACT:
A common-mode shifting circuit for shifting the common-mode output voltage of a CML device to an arbitrary voltage is disclosed. A constant current source is provided at each output of the CML device. The constant current may be a positive or negative current, tending to raise or lower the common-mode output voltage, respectively. The constant current sources are preferably connected to an alternate voltage supply having a higher voltage than that the supply for the CML device. The invention further provides a method for adjusting the output signal of a current-mode logic circuit having two or more output ports, comprising the step of providing a constant current at each output port of the current-mode logic circuit, whereby the common-mode voltage at the output ports of said current-mode logic circuit is level-shifted.

REFERENCES:
patent: 4868423 (1989-09-01), Abdi
patent: 5909127 (1999-06-01), Pearson et al.
patent: 5963084 (1999-10-01), Eschauzier
patent: 5977800 (1999-11-01), Iravani
patent: 6028454 (2000-02-01), Elmasry et al.
patent: 6353338 (2002-03-01), Fiedler et al.
patent: 6462590 (2002-10-01), Warwar
patent: 6677784 (2004-01-01), Yang
patent: 6762624 (2004-07-01), Lai
Mizuno et al., A GHz MOS Adaptive Pipeline Technique Using MOS Current-Mode Logic, IEEE Journal of Solid-State Circuits, vol. 31, No. 6, Jun. 1996, 784-791.
Heydari et al., Design of Ultra High-Speed CMOS CML buffers and Latches, IEEE International Symposium on Circuits and Systems (ISCAS), May 2003, 208-211.
Tanabe et al., 0.18 μm CMOS 10-Gb/s Multiplexer/Demultiplexer ICs Using Current Mode Logic with Tolerance to Threshold Voltage Fluctuation, IEEE Journal of Solid-State Circuits, vol. 36, No. 6, Jun. 2001, 988-996.
Payam Heydari, “Design and Analysis of Low-Voltage Current-Mode Logic Buffers,” IEEE International Symposium on Quality Electronic Design (ISQED), Mar. 2003, 293-298.
Musicer et al., MOS Current Mode Logic for Low Power, Low Noise CORDIC Computation in Mixed-Signal Environments, Proceedings of the 2000 International Symposium Low Power Electronics and Design, Rapallo, Italy, Jul. 25-27, 2000, ACM Press, 102-107.
Hemati et al., High Performance MOS Current Mode Logic Circuits, Ottawa-Carleton Institute for Electrical & Computer Engineering, Carleton University, Ottawa, Canada (downloaded from Internet)(date unknown).
Heydari et al., Design of Ultrahigh-Speed Low-Voltage CMOS CML Buffers and Latches, IEEE Transactions on VLSI Systems, vol. 12, No. 10, Oct. 2004, 1081-1093.

Affiliated with

Also associated with

Rating

Common-mode shifting circuit for CML buffers does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Common-mode shifting circuit for CML buffers, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Common-mode shifting circuit for CML buffers will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2792382