Common mode feedback circuit supporting dual data rate,...

Television – Camera – system and detail – Solid-state image sensor

Reexamination Certificate

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Reexamination Certificate

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07916198

ABSTRACT:
A common mode feedback circuit includes a first capacitor connected between a common mode feedback terminal and a first output terminal, a second capacitor connected between the common mode feedback terminal and a second output terminal, a first cell having a third capacitor sharing charges with the first capacitor and a fourth capacitor sharing charges with the second capacitor in response to a first clock control signal, and a second cell having a fifth capacitor sharing charges with the first capacitor and a sixth capacitor sharing charges with the second capacitor in response to a second clock control signal. The first clock control signal and the second clock control signal have respective logic states that do not overlap in time.

REFERENCES:
patent: 7692471 (2010-04-01), Uno
patent: 2009/0027524 (2009-01-01), Cho
patent: 2009/0058526 (2009-03-01), Hunter et al.
patent: 2006-074084 (2006-03-01), None
patent: 1020010111176 (2001-12-01), None
patent: 1020020063733 (2002-08-01), None

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