Common built in test (BIT) software architecture

Details Common built in test (BIT) software architecture Common built in test (BIT) software architecture

2008-03-11

2008-03-11

Baderman, Scott (Department: 2114)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

Reexamination Certificate

active

10404604

ABSTRACT:
A method for conducting a built in test on a system having a central processing unit (CPU), connected to one or more storage means, an input/output means and a plurality of assemblies PCI1, PCI2. . . PCIN to be tested. A test initiator, generally a system wide operating system running on a system CPU, starts the test. Each of the assemblies to be tested has an identified and a test requirement, presented in a format common for, and applicable to, a plurality of central processing units and associated assemblies.

REFERENCES:
patent: 4520440 (1985-05-01), Buonomo et al.
patent: 5764655 (1998-06-01), Kirihata et al.
patent: 6029257 (2000-02-01), Palmer
patent: 6073253 (2000-06-01), Nordstrom et al.
patent: 6219626 (2001-04-01), Steinmetz et al.
patent: 6643798 (2003-11-01), Barton et al.
patent: 6654707 (2003-11-01), Wynn et al.
patent: 6880116 (2005-04-01), Man et al.
patent: 6938243 (2005-08-01), Zeevi et al.
patent: 2002/0091966 (2002-07-01), Barton et al.

Affiliated with

Also associated with

Rating

Common built in test (BIT) software architecture does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Common built in test (BIT) software architecture, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Common built in test (BIT) software architecture will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3905086