Static information storage and retrieval – Read/write circuit – Including reference or bias voltage generator
Reexamination Certificate
2007-06-26
2011-12-20
Tran, Andrew Q (Department: 2824)
Static information storage and retrieval
Read/write circuit
Including reference or bias voltage generator
C365S189110, C365S227000, C365S226000, C365S225700, C327S536000, C327S537000, C327S535000
Reexamination Certificate
active
08081524
ABSTRACT:
A combo semiconductor memory apparatus capable of reducing current and power consumption is provided. The semiconductor memory apparatus includes: a signal generator that generates a voltage control signal according to the level of an external voltage; and a voltage generator that pumps up the level of the external voltage in response to the voltage control signal and outputs the pumped voltage to a high-level voltage output terminal, or supplies the external voltage as a high-level voltage.
REFERENCES:
patent: 5610863 (1997-03-01), Yamada
patent: 5936911 (1999-08-01), Inaba
patent: 6504783 (2003-01-01), Jo
patent: 6876246 (2005-04-01), Kim
patent: 6930948 (2005-08-01), Lee et al.
patent: 08-031171 (1996-02-01), None
patent: 2002170387 (2002-06-01), None
patent: 10-1999-0049422 (1999-07-01), None
patent: 1020010001583 (2001-01-01), None
patent: 1020040041955 (2004-05-01), None
patent: 1020060104871 (2006-10-01), None
Hynix / Semiconductor Inc.
Kaminski Jeffri A.
Tran Andrew Q
Venable LLP
LandOfFree
Combo-type semiconductor integrated circuit supplied with a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Combo-type semiconductor integrated circuit supplied with a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Combo-type semiconductor integrated circuit supplied with a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4312899