Combined hardware/software assertion checking

Details Combined hardware/software assertion checking Combined hardware/software assertion checking

2005-05-02

2008-09-16

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

07426705

ABSTRACT:
Assertion checking is achieved by modifying a given set of assertions to include subsuming assertions that cover one or more of given assertions and also require less logic to implement, by implementing at least the subsuming assertions in functionally reconfigurable circuitry within an integrated circuit, and by checking with an auxiliary tester assertions that each of the firing subsuming assertion replaced.

REFERENCES:
patent: 2006/0031807 (2006-02-01), Abramovici

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