Combined field/trench isolation region fabrication methods

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

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438424, 438427, 438426, H01L 2176

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active

058044914

ABSTRACT:
Isolation regions are fabricated on a substrate by forming a pattern region on the substrate, exposing spaced apart first and second areas of the substrate. The second area is then covered, preferably using sidewall spacers formed adjacent sidewall portions of the pattern region, while a portion of the first area is left exposed. A first insulation region is then formed on the exposed portion of the first area. The second area is then exposed and a trench isolation region is formed at the second area. Preferably, the pattern region is formed by forming a masking layer on the substrate and patterning the masking layer using a single photolithographic mask. The first insulation layer preferably is formed by thermally oxidizing the exposed portion of the first area. Preferably, the first area is wider than the second area.

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patent: 5372968 (1994-12-01), Lur et al.
patent: 5472904 (1995-12-01), Figura et al.
patent: 5498566 (1996-03-01), Lee
patent: 5679599 (1997-10-01), Mehta
patent: 5728620 (1998-03-01), Park

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