Combined e-beam and optical exposure semiconductor lithography

Details Combined e-beam and optical exposure semiconductor lithography Combined e-beam and optical exposure semiconductor lithography

2007-11-13

2007-11-13

Le, Thao X. (Department: 2814)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C257SE21206, C257SE21030, C430S005000, C438S016000

Reexamination Certificate

active

11080316

ABSTRACT:
Combined e-beam and optical exposure lithography for semiconductor fabrication is disclosed. E-beam direct writing to is employed to create critical dimension (CD) areas of a semiconductor design on a semiconductor wafer. Optical exposure lithography is employed to create non-CD areas of the semiconductor design on the semiconductor CD's of the semiconductor design can also be separated from non-CD's of the semiconductor design prior to employing e-beam direct writing and optical exposure lithography.

REFERENCES:
patent: 4612274 (1986-09-01), Cho et al.
patent: 4893163 (1990-01-01), Rudeck
patent: 5766806 (1998-06-01), Spence
patent: 6470489 (2002-10-01), Chang et al.
patent: 6583041 (2003-06-01), Capodieci
patent: 6828259 (2004-12-01), Fisher et al.
patent: 2002/0188924 (2002-12-01), Pierrat et al.

Affiliated with

Also associated with

Rating

Combined e-beam and optical exposure semiconductor lithography does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Combined e-beam and optical exposure semiconductor lithography, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Combined e-beam and optical exposure semiconductor lithography will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3867803