Column decoding circuit for semiconductor memory device

Details Column decoding circuit for semiconductor memory device Column decoding circuit for semiconductor memory device

1997-07-01

1998-07-07

Dinh, Son T.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

3652335, G11C 800

Patent

active

057779457

ABSTRACT:
A column decoding circuit for a semiconductor memory device includes a decoding unit and a pulse generating unit. The decoding unit decodes a selected column address and generates a selection signal. The pulse generating unit self-generates a pulse signal based on the selection signal output from the decoding unit. The pulse generating unit uses the self-generated pulse signal and the selection signal to output to a selected column switch a control signal having a minimum pulse width sufficient for selecting an associated column. Accordingly, a high speed read operation is performed by decreasing a loading and transmission time of the control signal. Further, power consumption of the column decoding circuit is decreased by self-generating the pulse signal, preferably based on the selection signal.

REFERENCES:
patent: 4947379 (1990-08-01), Okuyama
patent: 4972373 (1990-11-01), Kim et al.
patent: 5313434 (1994-05-01), Abe
patent: 5526322 (1996-06-01), Lee
patent: 5566129 (1996-10-01), Nakashima et al.
patent: 5640363 (1997-06-01), Furutani et al.

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