Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2011-05-10
2011-05-10
Kim, Matt (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S119000, C711S141000, C711S146000, C711SE12026, C711SE12027
Reexamination Certificate
active
07941610
ABSTRACT:
Coherency directory updating is provided in a multiprocessor computing system. A plurality of memory resources have a directory, and are operably connected to an interconnect fabric. A cell is operably connected to the interconnect fabric. The cell has a cache including an entry for each of a plurality of coherency units, each coherency unit included in a memory block representing a contiguous portion of the plurality of memory resources. A controller is operably connected to the interconnect fabric. The controller is configured to control a portion of the plurality of memory resources, and has a comparator configured to identify whether a memory block is local. If the memory block is local, the controller is configured to set a state of the directory to exclusive for a write transaction. If the memory block is not local, the controller is configured to set the state to invalid for a write transaction.
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Handgen Erin A.
Knebel Patrick
Alsip Michael
Hewlett--Packard Development Company, L.P.
Kim Matt
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