Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With bumps on ends of lead fingers to connect to semiconductor
Reexamination Certificate
2001-09-21
2003-05-06
Talbott, David L. (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
With bumps on ends of lead fingers to connect to semiconductor
C257S674000, C257S724000, C257S735000, C257S775000, C257S778000, C438S110000, C438S119000, C367S086000, C174S259000
Reexamination Certificate
active
06559524
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device having a structure called chip-on-film (COF), in which a semiconductor chip is mounted on a flexible wiring board. More particularly, it relates to a tape carrier to be used for producing such a semiconductor device.
Besides the COF-structured semiconductor device (hereinafter simply referred to as “COF semiconductor device”), a tape carrier package (TCP) can be mentioned as a semiconductor device in which a semiconductor chip is mounted on a flexible wiring board, can be mentioned. The difference between these devices is as follows. In the TCP, an insulating tape as a base material of the flexible wiring board has an opening in a chip-mounting region (a portion where a semiconductor chip is mounted), and tip portions of a wiring pattern projecting into the opening like cantilevers are bonded to the semiconductor chip. On the other hand, in the COF semiconductor device, an insulating tape has no opening, and a semiconductor chip is bonded to a wiring pattern formed on a surface of the insulating tape.
FIGS. 8 and 9
show the structure of a conventional COF semiconductor device.
FIG. 8
is a plan view of essential parts of the conventional semiconductor device.
FIG. 9
is a sectional view taken along the line IX—IX of FIG.
8
. In these figures, the reference numeral
1
indicates a semiconductor chip, reference numeral
2
indicates a protrusion electrode (bump) of the semiconductor device
1
, reference numeral
3
indicates a sealing resin, reference numeral
4
indicates an insulating tape, reference numeral
5
indicates a wiring pattern and reference numeral
6
indicates a solder resist having an opening
6
a.
The wiring pattern
5
includes a plurality of inner leads
8
having, at their tips, electrically connecting portions (hereinafter referred to as simply “connecting portions”)
8
a
that are electrically connected to the protrusion electrodes
2
, and unshown connectors for external connection, namely, outer leads. The solder resist
6
is applied to wiring pattern portions other than the connecting portions
8
a
and the outer leads to secure an insulating state.
In the COF semiconductor device, a freely bendable thin film-shaped insulating tape
4
is used as the base material of the flexible wiring board. The connecting portion
8
a
of each of the inner leads
8
of the wiring pattern arranged on the surface of this insulating tape
4
is electrically connected to a corresponding protrusion electrode
2
of the semiconductor chip
1
. This semiconductor device is to be connected to a liquid crystal panel or a printed wiring board through the outer leads.
At present, one of the recent demands on the COF semiconductor device is to increase the number of pins. In order to satisfy this demand together with other demands for further miniaturization and thinning of the device, it is required to make finer the pitch of the connecting portions
8
a
of the inner leads
8
to be connected to the semiconductor chip, and the pitch of the outer leads for external connection in the wiring pattern
5
, as well as to reduce the thickness of the insulating tape
4
and the wiring pattern
5
.
However, in order to decrease the pitch of the inner leads
8
, it is required to reduce the width of the inner leads. Further, for that purpose, it is also required to reduce the thickness of the inner leads. Accordingly, if the pitch of the inner leads is decreased, mechanical strength of the inner leads deteriorates. As a result, when the semiconductor device is used under the environment of alternately repeated low temperatures and high temperatures, namely repeated thermal expansion and thermal contraction due to temperature cycles, stress is generated in the vicinity of the edge
6
b
of the opening
6
a
of the solder resist
6
because of a difference in coefficient of thermal expansion of materials used, which leads to a problem of breaking of the inner leads
8
in that portion. For this reason, in the conventional COF structure, it is difficult to achieve fine pitches.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a COF-use tape carrier that can prevent the breaking of inner leads in the vicinity of an opening of the solder resist, which tends to occur during temperature cycles, and also provide a semiconductor device produced using the tape carrier, and a method of producing the semiconductor device.
In order to accomplish the above object, a COF-use tape carrier according to an aspect of the present invention includes:
a flexible insulating tape;
a wiring pattern formed on the insulating tape, the wiring pattern including inner leads and outer leads;
a solder resist covering the inner leads, the solder resist having an opening in a portion corresponding to a semiconductor chip-mounting region of the insulating tape, with portions of the inner leads to be electrically connected to a semiconductor chip being exposed from the opening of the solder resist; and
one or more dummy leads formed in the proximity of an edge of the opening of the solder resist, the dummy leads being not to be electrically connected to the semiconductor chip,
wherein some spaces between adjacent two inner leads are wide and others are narrow, and the dummy lead is formed between adjacent two inner leads that are widely spaced from each other.
Due to the presence of at least one dummy lead, which are not intended to be connected to the semiconductor chip, in the proximity of the edge of the opening of the solder resist, stress applied to that portion will be shared among the inner leads and the dummy leads. Therefore, compared with a case where there is no dummy lead, stress applied to one inner lead is reduced. That is, according to the present invention, provided that the width and thickness of the inner leads in the tape carrier with the dummy leads are the same as those in the tape carrier without any dummy leads, the mechanical strength of the inner leads themselves is practically improved. Accordingly, even if the width of the inner leads is reduced, deterioration in strength can substantially be prevented, which makes it possible to cope with an increase in the number of pins.
In one embodiment, the dummy leads extend across the edge of the opening of the solder resist such that one end of each dummy lead is located within the opening of the solder resist, while the other end thereof is located under the solder resist.
Although the material and thickness of the dummy leads may be different from those of the wiring pattern, they may be preferably the same. If the dummy leads and the wiring pattern are made of different materials, those materials should have an equal expansion coefficient. If the material and thickness of the dummy leads are the same as those of the inner leads, it is possible to form the wiring pattern including the inner leads, and the dummy leads simultaneously by patterning the same wiring material, for example a copper foil. That is, they can be fabricated using the same process steps by merely adding the portions corresponding to the dummy leads to a pattern mask to be used at the time of patterning the wiring material (etching step).
The widths of the dummy leads may be equal to or narrower than a width of inner lead portions at the edge of the opening of the solder resist.
At least one of the dummy leads may be combined, or united, with an adjacent inner lead. By combining these leads, an amount of the wiring pattern on the edge of the opening of the solder resist can be increased, as compared with a case where they are not combined. This will result in further improvement of the effect of preventing the breaking of the inner leads.
The wiring pattern and the dummy leads may directly be fixed onto the insulating tape without interposition of an adhesive, or they may be fixed onto the insulating tape through the adhesive.
A COF-use tape carrier according to another aspect of the present invention includes:
a flexible insulating tape;
a wiring pattern formed on t
Chambliss Alonzo
Nixon & Vanderhye P.C.
Sharp Kabushiki Kaisha
Talbott David L.
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