Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-10-04
2005-10-04
Smith, Matthew (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
06952810
ABSTRACT:
A method is provided, the method comprising collecting related signals capable of having unrelated names into a Krutibus, defining a bus capable of connecting the related signals in a bus definition file in the Krutibus and providing at least one of component declarations of the bus and different uses of the bus in a hardware description language (HDL) circuit description using the bus definition file in the Krutibus. The method also comprises providing a Krutibus preprocessor to read the hardware description language (HDL) circuit description for the at least one of the component declarations of the bus and the different uses of the bus and to generate a hardware description language (HDL) circuit description naming the bus components.
REFERENCES:
patent: 6631470 (2003-10-01), Chang et al.
patent: 6721937 (2004-04-01), Chard et al.
Biswal Krutibas
Butcher Lawrence
Srinivasan Arvind
Dinh Paul
Martine & Penilla & Gencarella LLP
Smith Matthew
Sun Microsystems Inc.
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