Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
Reexamination Certificate
2008-07-29
2008-07-29
Lamarre, Guy J. (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error/fault detection technique
C714S755000, C714S784000, C714S788000
Reexamination Certificate
active
07406654
ABSTRACT:
A coding circuit for generating an error correction code from digital data to be recorded in a record medium, includes a buffer manager which successively reads the digital data m bytes at a time from a temporal storage memory in a main scan direction and in a sub-scan direction, a PI parity unit which processes the data m bytes at a time, as the m bytes are supplied from the buffer manager, and generates a PI sequence parity based on the data for one row extending in the main scan direction, and a PO parity unit which includes in operation units, each of which processes a corresponding byte of the data, as m bytes of the digital data are supplied from the buffer manager, and generates a PO sequence parity based on the data for one column extending in the sub-scan direction.
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Cooper & Dunham LLP
Lamarre Guy J.
Ricoh & Company, Ltd.
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