Coaxial capacitor for DRAM memory cell

Details Coaxial capacitor for DRAM memory cell Coaxial capacitor for DRAM memory cell

1996-06-03

1999-02-09

Martin-Wallace, Valencia

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257296, 257306, 257309, 365174, 438396, 438397, H01L 27108, H01L 2976

Patent

active

058698612

ABSTRACT:
A DRAM capacitor is formed over a device with FOX regions and device areas with S/D regions. Form a planarization silicon oxide layer over the device and FOX areas covered with an etch stop layer and a first portion of a first capacitor plate over the planarization layer, a contact opening to the S/D areas by etching through the first capacitor layer and layers down to a S/D region. Form a second portion of a first plate over the device and through the contact opening into electrical and mechanical contact with one of the S/D areas, the second portion has exposed sidewalls and a top surface extending above the surface of the device. Form sacrificial spacers adjacent to the sidewalls of the second portion. Deposit a third portion of the first plate over the device. Etch back the third portion down to the etch stop layer to expose the sacrificial structure and remove the sacrificial structure. Form an interconductor dielectric layer and an upper capacitor plate extending between the second and third portions.

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