Coating process for patterned substrate surfaces

Details Coating process for patterned substrate surfaces Coating process for patterned substrate surfaces

2008-04-15

2008-04-15

Ghyka, Alexander (Department: 2812)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S763000, C438S778000, C257SE21171, C257SE21528, C257SE21585

Reexamination Certificate

active

07358187

ABSTRACT:
The present invention provides a coating process for patterned substrate surfaces, in which a substrate (101) is provided, the substrate having a surface (105) which is patterned in a substrate patterning region (102) and has one or more trenches (106) that are to be filled to a predetermined filling height (205), a catalyst layer (201) is introduced into the trenches (106) that are to be filled, a reaction layer (202) is deposited catalytically in the trenches (106) that are to be filled, the catalytically deposited reaction layer (202) is densified in the trenches (106) that are to be filled, and the introduction of the catalyst layer (201) and the catalytic deposition of the reaction layer (202) are repeated until the trenches (106) that are to be filled have been filled to the predetermined filling height (205).

REFERENCES:
patent: 2002/0064592 (2002-05-01), Datta et al.
patent: 2003/0015764 (2003-01-01), Raaijmakers et al.
patent: WO 01/78123 (2001-10-01), None
patent: WO 03/083167 (2003-10-01), None
Hausmann et al., “Rapid Vapor Deposition of Highly Conformal Silica Nanolaminates,”SCIENCE, vol. 298, pp. 402-406, Oct. 11, 2002.
German Office Action dated Apr. 8, 2005.

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