Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Reexamination Certificate
2005-12-13
2005-12-13
Norton, Nadine G. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
C252S079100, C252S079400
Reexamination Certificate
active
06974777
ABSTRACT:
The invention provides a method of polishing a substrate containing a low-k dielectric layer comprising (i) contacting the substrate with a chemical-mechanical polishing system comprising (a) an abrasive, a polishing pad, or a combination thereof, (b) an amphiphilic nonionic surfactant, and (c) a liquid carrier, and (ii) abrading at least a portion of the substrate to polish the substrate.
REFERENCES:
patent: 5527423 (1996-06-01), Neville et al.
patent: 5849233 (1998-12-01), Altieri et al.
patent: 5958794 (1999-09-01), Bruxvoort et al.
patent: 6043155 (2000-03-01), Homma et al.
patent: 6046112 (2000-04-01), Wang
patent: 6062968 (2000-05-01), Sevilla et al.
patent: 6117000 (2000-09-01), Anjur et al.
patent: 6126532 (2000-10-01), Sevilla et al.
patent: 6153525 (2000-11-01), Hendricks et al.
patent: 6270393 (2001-08-01), Kubota et al.
patent: 6270395 (2001-08-01), Towery et al.
patent: 6313039 (2001-11-01), Small et al.
patent: 6348076 (2002-02-01), Canaperi et al.
patent: 6376381 (2002-04-01), Sabde
patent: 6383240 (2002-05-01), Nishimoto et al.
patent: 6420269 (2002-07-01), Matsuzawa et al.
patent: 2001/0005009 (2001-06-01), Tsuchiya et al.
patent: 2001/0008828 (2001-07-01), Uchikura et al.
patent: 2001/0013507 (2001-08-01), Hosali et al.
patent: 2001/0054706 (2001-12-01), Levert et al.
patent: 2002/0016060 (2002-02-01), Matsuzawa et al.
patent: 2002/0023389 (2002-02-01), Minamihaba et al.
patent: 1 088 869 (2001-04-01), None
patent: 0 810 302 (2001-08-01), None
patent: 1 148 538 (2001-10-01), None
patent: WO 00/49647 (2000-08-01), None
patent: WO 01/32794 (2001-05-01), None
McClatchie S. et al., “Low Dielectric Constant Oxide Films Deposited Using CVD Techniques” DUMIC Conference Proceedings, Feb., 1998, pps. 311-318.
Chamberlain Jeffrey P.
Chou Homer
Hawkins Joseph D.
Moeggenborg Kevin J.
Cabot Microelectronics Corporation
Lanning Robert
Norton Nadine G.
Umez-Eronini Lynette T.
LandOfFree
CMP compositions for low-k dielectric materials does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with CMP compositions for low-k dielectric materials, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and CMP compositions for low-k dielectric materials will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3506331