CMOSFET with hybrid strained channels

Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction

Reexamination Certificate

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Details

C257S019000, C257S338000, C257S357000, C257S369000, C257S371000

Reexamination Certificate

active

07145166

ABSTRACT:
Disclosed is a method of manufacturing microelectronic devices including forming a silicon substrate with first and second wells of different dopant characteristics, forming a first strained silicon-germanium-carbon layer of a first formulation proximate to the first well, and forming a second strained silicon-germanium-carbon layer of a second formulation distinct from the first formulation proximate to the second well. Capping and insulating layers, gate structures, spacers, and sources and drains are then formed, thereby creating a CMOS device with independently strained channels.

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Yee-Chia Yeo et al., “Design and Fabrication of 50-nm Thin-Body p-MOSFETs With a SiGe Heterostructure Channel”, IEEE Transactions On Electron Device, Feb. 2002, pp. 279-286, vol. 49, No. 2, 0018-9383/02.

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