CMOS voltage controlled phase shift oscillator

Details CMOS voltage controlled phase shift oscillator CMOS voltage controlled phase shift oscillator

2001-05-17

2003-03-18

Pascal, Robert (Department: 2817)

Oscillators

Ring oscillators

C331S10800D, C331S135000

Reexamination Certificate

active

06535071

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to integrated circuits. In particular, the invention relates to CMOS voltage controlled phase shift oscillators.
BACKGROUND OF THE INVENTION
Two types of oscillators are commonly used in CMOS integrated circuits to generate high frequency signals. A first type includes L-C oscillators. L-C oscillators with spiral inductors are used as voltage controlled oscillators (VCO's) in RF and wireless communication circuits. An example of this type of VCO's is described in an article by L. M. Burns, entitled, “Applications for GaAs and Silicon Integrated Circuits in next generation wireless communication systems,” IEEE J. Solid-State Circuits, Vol. 30, No. 10, pp. 1088-1095 October 1995. A second type of oscillators includes ring oscillators. Ring oscillators can be used to generate high frequency clocking voltages or signals in digital integrated circuits. An example of this type of oscillator is described in an article by L. Sun et al., entitled “Quadrature output voltage controlled ring oscillator based on three-stage sub-feedback loops,”IEEE Int. Symp. On Circuits and Systems, Orlando Fla., vol. II, pp. 176-170, May 1999. VCO's are also required in phase locked loops employed in communication systems and digital integrated circuits for signal and clock recovery. The use of VCO's in these types of applications are described in an article by W. Rhee, “Design of low-jitter 1-GHz phase-locked loops for digital clock generation,” IEEE Int. Symp. On Circuits and Systems, Orlando, Fla., vol.II, pp. 520-523, May 1999.
FIG. 1
shows a commonly employed CMOS VCO using resonant L-C circuits with spiral inductors (see J. Craninckx and M. Steyaert, “A 1.8 GHz low-phase-noise spiral-LC CMOS VCO,” Symp. on VLSI Circuits, 1996, pp. 30-31). One difficulty with this approach has been the fabrication of high Q inductors on the lossy silicon substrates. One solution to the above approach includes techniques for fabricating high Q inductors and VCO's without inductors or high Q active inductors using transistors to compensate for the losses in inductors or replace inductors are disclosed in copending applications by the same inventor (see P. Farrar and L. Forbes, “HIGH Q AIRBRIDGE INDUCTORS FOR SILICON CMOS RF INTEGRATED CIRCUITS,” U.S. Pat. No. 6,025,261, 15.
The second commonly used technique to generate high frequency signals in CMOS integrated circuits is a ring oscillator as shown in
FIG. 2A
(see L. Sun et al., “Quadrature output voltage controlled ring oscillator based on three-stage sub-feedback loops,” IEEE Int. Symp. On Circuits and Systems, Orlando, Fla., vol. II, pp. 176-170, May 1999). A ring oscillator uses an odd number of inverters in an unstable ring configuration which depends of the signal delay through each stage to generate a signal which returns to the input inverted to the original input but at a later time. A larger number of stages results in a lower frequency of oscillation as shown in
FIG. 2B
, where fo=1/(2 n tprop), where tprop is the propagation delay of the inverter stages used in the ring.
Phase shift oscillators are based on a 180 phase shift through a passive R-C network to generate a signal which appears back at the input of an inverting amplifier in phase with the original signal a shown in FIG.
3
A. CMOS phase shift oscillators have been previously described. For a further description on the same, see M. Caughey et al., “Circuit simulation by computer,” Telesis (Bell-Northern Research), Vol. 2, no. 6, pp. 17-24, 1972; and G. W. Short, “CMOS phase shift oscillators,” New Electronics, vol. 13, no. 5, p. 64, Mar. 4, 1980. While passive tapered networks work well for low frequency oscillators they constitute a problem for high frequency oscillators in COOS technology. As shown in
FIG. 3A
, the resistances and impedance levels get successively large from one stage to the next so that the stages do not load the previous stage. Each can be treated as a separate stage each with 60 degrees phase shift, as shown in FIG.
3
B.
FIG. 3B
is a phase shift diagram for a given stage in
FIG. 3A
which plots the imaginary phase component (Im) verses the real phase component (Re). As represented in
FIG. 3A
, the last capacitance in the sequence will be by necessity small, e.g. C/100, or have a large impedance, the input capacitance of the amplifier can and will be comparable loading the last stage and upsetting the correct phase relationships.
FIG. 3C
is a gain-phase shift diagram illustrating the gain and phase shift per stage in the conventional phase shift oscillator of FIG.
3
A.
FIG. 3D
illustrates a circuit simulation expressed as voltage versus time for the conventional phase shift oscillator of FIG.
3
A. With three passive stages, as illustrated in
FIG. 3A
, the gain of the amplifier must be about ten or larger so that the loop gain will be larger than one. Each R-C stage reduces the gain by about a factor of two. CMOS amplifiers typically have only limited gain bandwidth products and a gain of ten implies a low bandwidth and low frequency operation and oscillations.
Therefore, there is a need in the art to provide improved phase shift oscillators, or phase shift networks in which the oscillation frequency can be increased by increasing the number of stages and where each stage has a small gain and phase shift. It is also desirable to be able to control the phase shift by an externally applied voltage.
SUMMARY OF THE INVENTION
The above mentioned problems with oscillator circuits and other problems are addressed by the present invention and will be understood by reading and studying the following specification. Systems and methods are provided for CMOS voltage controlled phase shift oscillators.
In one embodiment of the present invention, a phase shift circuit is provided having any odd number of stages coupled in series between a circuit input and a circuit output. Each stage includes a CMOS amplifier coupled to the input. A phase shift network is coupled to the CMOS amplifier. The CMOS amplifier provides a gain and allows a small phase shift in each stage to eventually provide a signal which is 180 degrees out of phase with the input signal. In the CMOS amplifier, the PMOS transistor is a diode connected PMOS transistor which acts as a low valued load resistance. In the phase shift network, an NMOS transistor is used as a voltage variable resistor for providing a resistance value in the circuit. A source region of the phase shift network NMOS transistor is coupled to a gate bias supply, VGG, and a drain region of the phase shift network NMOS transistor is coupled to a gate of the NMOS transistor in the CMOS amplifier to provide a gate bias to the NMOS transistor in the CMOS amplifier.


REFERENCES:
patent: 3931588 (1976-01-01), Gehweiler
patent: 4891609 (1990-01-01), Eilley
patent: 5912575 (1999-06-01), Takikawa
patent: 5939950 (1999-08-01), Kamei
patent: 6025261 (2000-02-01), Farrar et al.
patent: 6107893 (2000-08-01), Forbes
patent: 6239684 (2001-05-01), Farrar et al.
patent: 6376895 (2002-04-01), Farrar et al.
patent: 6377156 (2002-04-01), Farrar et al.
Burns, L.., “Applications for GaAs and Silicon Integrated Circuits in Next Generation Wireless Communication Systems”,IEEE Journal of Solid-State Circuits, 30(10), (1995),pp. 1088-1095.
Caughey, M., et al. ,“Circuit Simulation by Computer”,Telesis, 2(6), (1972),pp. 17-24.
Craninckx, J., et al. ,“A 1.8-GHz Low-Phase-Noise Spiral-LC CMOS VCO”,IEEE, Symposium on VLSI Circuits Digest of Technical Papers, (1996),pp. 30-31.
Rhee, W., “Design of Low-Jitter 1-GHZ Phase-Locked Loops for Digital Clock Generation”,Proceedings of the 1999 IEEE International Symposium on Circuits and Systems, (1999),pp. 520-523.
Short, G., “CMOS phase shift oscillators”,New Electronics, 13(5), (1980),p. 64.
Sun, L., et al. ,“A Quadrature Output Voltage Controlled Ring Oscillator Based on Three-Stage Sub-feedback Loops”,Proceedings of the 1999 IEEE International Symposium on Circuits and Systems, (1999),pp. 176-179.

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