CMOS transistor and isolated back gate electrodes on an SOI subs

Details CMOS transistor and isolated back gate electrodes on an SOI subs CMOS transistor and isolated back gate electrodes on an SOI subs

1995-06-06

1997-04-08

Tran, Minhloan

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257351, 257365, 257369, H01L 2701

Patent

active

056190549

ABSTRACT:
The present invention is intended to provide, in MOS transistors used as a bonding layer for silicon regions of an SOI substrate, an nMOS transistor on a silicon region of an SOI substrate which uses a polycrystalline silicon layer as a layer to be bonded with the silicon substrate and a pMOS transistor on another silicon region of the SOI substrate and electrically isolated back gate electrodes through a back gate insulation film on the silicon region side between the silicon regions and a polycrystalline silicon layer. A leak current is reduced and a malfunction of the transistors is eliminated by providing pickup electrodes for the back gate electrodes.

REFERENCES:
patent: 5185535 (1993-02-01), Farb et al.

Affiliated with

Also associated with

Rating

CMOS transistor and isolated back gate electrodes on an SOI subs does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with CMOS transistor and isolated back gate electrodes on an SOI subs, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and CMOS transistor and isolated back gate electrodes on an SOI subs will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2399177