CMOS terminating resistor circuit

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination

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326 86, 333 22R, H03K 1716, H03K 19094

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active

055594484

ABSTRACT:
An improved CMOS termination is disclosed wherein a transmission gate provides the proper impedance for matching a termination with the characteristic impedance of the line.

REFERENCES:
patent: 4859877 (1989-08-01), Cooperman et al.
patent: 5124580 (1992-06-01), Matthews et al.
patent: 5254883 (1993-10-01), Horowitz et al.
patent: 5283479 (1994-02-01), Rosseel et al.
patent: 5329184 (1994-07-01), Redfern
patent: 5396028 (1995-03-01), Tomasseth
patent: 5422608 (1995-06-01), Levesque
Horenstein. "Microelectronic Circuits and Devices", Prentice Hall: New Jersey, 1990. pp. 302-309.
"Terminieren von Signalleitungen, Korrekte Abschlusse vermeiden Echos und Uberschwinger", Elektronik 22/1990, pp. 236-254.
Paul R. Gray, Robert G. Meyer, "Analysis and Design of Analog Integrated Circuits", John Wiley & Sons, New York, 1984, pp. 731-736.
IEEE Standard for Low-Voltage Differential Signals for SCI (LVDS), IEEE Standard P1596.3, Dec. 30, 1993.

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