CMOS static logic circuit

Details CMOS static logic circuit CMOS static logic circuit

1995-10-18

1997-08-05

Westin, Edward P.

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Field-effect transistor

326 17, H03K 1920

Patent

active

056546513

ABSTRACT:
A static logic circuit employs pull-down type logic gates having logic transistors forming a power supply current path and logic transistors forming a grounding current path and having current drive abilities higher than those of the logic transistors forming the power supply current path, and pull-up type logic gates having logic transistors forming a power supply current path and logic transistors forming a grounding current path and having current drive abilities lower than the logic transistors forming the power supply current path, and comprises logic series formed by alternately cascading the two types of the logic gates. The static logic circuit is provided with signal merged logic circuits each of which provides a signal having a high speed falling transient and a high speed rising transient by merging the output signals of the logic series.

REFERENCES:
patent: 4613772 (1986-09-01), Young
patent: 4621207 (1986-11-01), Suganuma
patent: 4649296 (1987-03-01), Shoji
patent: 5001367 (1991-03-01), Vinal
patent: 5352939 (1994-10-01), Hirabayishi
Kan M. Chu and David L. Pulfrey, A Comparison of CMOS Circuit Techniques: Differntial Cascode Voltage Switch Logic Versus Conventional Logic; IEEE Journal of Solid-State Circuits, vol. SC-22, No. 4, Aug. 24, 1987, pp. 528-532.

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