CMOS sense amplifier with N-channel sensing

Details CMOS sense amplifier with N-channel sensing CMOS sense amplifier with N-channel sensing

1988-03-18

1992-08-11

Moffitt, James W.

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

307530, 365203, G11C 700

Patent

active

RE0340260

ABSTRACT:
A CMOS sense amplifier for a dynamic read/write memory employs a latch circuit with cross-coupled N-channel transistors and cross-coupled P-channel transistors, returned to the voltage supply and ground through P and N channel transistors selectively activated by sense clocks. Differential inputs of the sense amplifier are connected to the bit lines. The N-channel transistors are employed for initial sensing, and then both N-channel and P-channel transistors in sequential order for amplification and restoring the I-level. This results in better balance, and smaller N and P channel latch transistors may be used, saving area, saving power and increasing speed.

REFERENCES:
patent: 4169233 (1979-09-01), Haraszti
patent: 4195357 (1980-03-01), Kuo et al.
patent: 4551641 (1985-11-01), Pelley, III
patent: 4627033 (1986-12-01), Hyslop et al.
patent: 4658382 (1987-04-01), Tran et al.
patent: 4860255 (1989-08-01), Shimohigashi et al.
H. H. Chao et al., "CMOS Sense-Restore Circuits for One-Device FET Dynamic RAM", IBM TDB, vol. 25, No. 10, Mar. 1983, pp. 5088-5091.

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