CMOS receiver circuit

Electronic digital logic circuitry – Interface – Logic level shifting

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Details

326 17, 326 73, H03K 190185

Patent

active

055393330

ABSTRACT:
A clock distribution system for a data processing system is implemented in CMOS technology wherein a full-swing differential clock signal is converted to a low-voltage swing differential clock signal by a driver's circuit and then returned to a full-swing differential clock signal at each receiver circuit.

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