CMOS processing with low and high-current FETs

Fishing – trapping – and vermin destroying

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

437 34, 437 57, H01L 218238

Patent

active

055478948

ABSTRACT:
A method of processing CMOS circuits provides up to three types of transistors (standard NFETs, PFETs and high current NFETs) without additional masking steps by the simultaneous implantation of the standard PFET and the high current NFET low doped source and drain implants and a separate implantation of the standard NFET.

REFERENCES:
patent: 4929565 (1990-05-01), Parrillo
patent: 4968639 (1990-11-01), Bergonzoni
patent: 5047358 (1991-09-01), Kosiak et al.
patent: 5141890 (1992-08-01), Haken
patent: 5252501 (1993-10-01), Moslehi
patent: 5254487 (1993-10-01), Tamagawa
patent: 5432114 (1995-07-01), O
patent: 5468666 (1995-11-01), Chapman
patent: 5498554 (1996-03-01), Mei
patent: 5500392 (1996-03-01), Reynolds et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

CMOS processing with low and high-current FETs does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with CMOS processing with low and high-current FETs, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and CMOS processing with low and high-current FETs will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2330481

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.