CMOS Process with unique plasma etching step

Details CMOS Process with unique plasma etching step CMOS Process with unique plasma etching step

1983-07-25

1984-05-08

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156643, 156646, 156653, 156657, 1566591, 156662, 204192E, 252 791, H01L 21306, B44C 122, C03C 1500, C03C 2506

Patent

active

044472900

ABSTRACT:
A CMOS process which provides a self-aligned guardband in a high density circuit is disclosed. A polysilicon masking member is used to define a well and also to provide alignment for the guardband. A single plasma etching step etches silicon nitride in one area and both silicon nitride and polysilicon in another area prior to growth of field oxides.

REFERENCES:
patent: 4330384 (1982-05-01), Okudaira et al.

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