CMOS linear amplifier formed with nonlinear transistors

Details CMOS linear amplifier formed with nonlinear transistors CMOS linear amplifier formed with nonlinear transistors

2001-08-08

2002-07-02

Pascal, Robert (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including push-pull amplifier

C330S276000

Reexamination Certificate

active

06414550

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to linear CMOS amplifiers.
BACKGROUND OF THE INVENTION
There is a strong need for power amplifiers to have linear characteristics. Unfortunately, most CMOS transistors often used in amplifier construction are inherently non-linear. Consequently, a technique for accomplishing linear amplification using nonlinear components is desired.
FIG.
1
(
a
) shows a typical CMOS transistor used for amplification. FIG.
1
(
b
) shows the nonlinear I-V (current−voltage) relationship produced by the CMOS amplifier of FIG.
1
(
a
). Equation 1 illustrates the relationship between transistor current I
DS
and gate voltage V
GS
.
I
DS
=&mgr;C
o
(
W/L
)((
V
GS
−VT
)/2)
2
  (1)
Let V
GS
=V
GS
+&Dgr;V sin(&ohgr;t).
I
DS
=&mgr;C
o
(
W/L
)((
V
Gs
−VT
)+&Dgr;
V
sin(
&ohgr;t
)
2
I
DS
=&mgr;C
o
(
W/L
)[(
V
GS
−VT
)
2
+2(
V
GS
−VT
)&Dgr;
V
sin(&ohgr;
t
)+&Dgr;
V
sin
2
(
&ohgr;t
)]
Using the trigonometry identity sin
2
(&ohgr;t)=½(1−cos(2&ohgr;t)),
I
DS
=&mgr;C
o
(
W/L
)[(
V
GS
−VT
)
2
+2(
V
GS
−VT
)&Dgr;
V
sin(&ohgr;
t
)+&Dgr;
V
2
/2−½&Dgr;
V
2
cos(2
&ohgr;t
)]
Which can be broken down into the components
I
DS
=C
o
(
W/L
)[(
V
GS
−VT
)
2
+&Dgr;V
2
/2  (2)
 +2(
V
GS
−VT
)&Dgr;
V
sin(
&ohgr;t
)  (3)
−½&Dgr;
V
2
cos(2&ohgr;
t
)]  (4)
Equation 1 above represents the well-known square law characteristics of a transistor, where &mgr; is electron mobility; C
o
is capacitance per unit area; W is channel width; L is channel length; &ohgr; is signal frequency, and &Dgr;V is signal magnitude. Equation component (2) represents the portions of the amplified signal that are DC components. Equation component (3) represents the portions of the input signal that are desired to be amplified. Equation component (4) represents the 2
nd
harmonic components of the amplified signal. A circuit which removes this unwanted harmonic distortion is desired to provide a more linear transistor output.
SUMMARY OF THE INVENTION
In one aspect the invention provides an apparatus and method which provides a linear CMOS amplifier using nonlinear components. The apparatus includes an NMOS transistor amplifier which has a nonlinear output, a PMOS transistor amplifier which also has a nonlinear output, where the NMOS and PMOS transistor amplifiers are connected to the same input source so that the nonlinearities are mirror images of each other, and one or more transformers for combining the outputs of the NMOS and PMOS transistor amplifiers, resulting in the cancellation of the mirror image nonlinearities and reducing the nonlinearity of the CMOS amplifier.


REFERENCES:
patent: 1686792 (1928-10-01), Black
patent: 3202939 (1965-08-01), Reiling
patent: 3230467 (1966-01-01), Atherton et al.
patent: 4071830 (1978-01-01), Huntington
patent: 4097814 (1978-06-01), Cohn
patent: 4275360 (1981-06-01), Gill et al.
patent: 6025261 (2000-02-01), Farrar et al.
patent: 6049248 (2000-04-01), Glas et al.
H.S. Black, “Inventing the Negative Feedback Amplifier”, IEEE Spectrum, pp. 55-60, 1977.
T.H. Lee, “The Design of CMOS Radio-Frequency Integrated Circuits”, Cambridge Univ. Press, Cambridge, UK and NY, pp. 387-390, 1998.
Y. Ding and R. Harjani, “A +18dBm IIP3 LNA in 0.35 um CMOS” Proc. Int. Solid-State Circuits Conference, San Francisco, Feb. 2001, paper 10.5.
J. L. Dawson, “Power Amplifier Linearization Techniques: An Overview,” Workshop on RF circuits for 2.5G and 3G Wireless Systems, 2001 Int. Solid-State Circuits Conf., San Francisco, Feb. 4, 2001.

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