Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Patent
1996-12-06
1999-02-09
Whitehead, Jr., Carl
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
257347, 257344, 257336, 257900, H01L 2900
Patent
active
058698795
ABSTRACT:
An integrated circuit is formed whereby junction of NMOS transistors are formed dissimilar to junctions of PMOS transistors. The NMOS transistors include an LDD area, an MDD area and a heavy concentration source/drain area. Conversely, the PMOS transistor include an LDD area and a source/drain area. The NMOS transistor junction is formed dissimilar from the PMOS transistor junction to take into account the less mobile nature of the junction dopants relative to the PMOS dopants. Thus, a lessening of the LDD area and the inclusion of an MDD area provide lower source/drain resistance and higher ohmic connectivity in the NMOS device. The PMOS junction includes a relatively large LDD area so as to draw the highly mobile, heavy concentration boron atoms away from the PMOS channel.
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Fulford Jr. H. Jim
Gardner Mark I.
Wristers Derick J.
Advanced Micro Devices , Inc.
Daffer Kevin L.
Jr. Carl Whitehead
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