CMOS integrated circuit

Details CMOS integrated circuit CMOS integrated circuit

1993-01-13

1994-06-21

Wojciechowicz, Edward

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257372, 257375, H01L 2702

Patent

active

053230434

ABSTRACT:
A first shallow well 5, a second shallow well 3, a third deep well 4, a fourth shallow well 5' and a fifth shallow well 2 are formed on an electroconductive substrate 1, in which a first and second digital series power supplies DVDD, DVSS are each connected to the first shallow well 5 completely included by the third deep well 4 and the second shallow well 3 partially included by the third deep well 4 respectively, a first and second analog series power supplies AVDD, AVSS are each connected to the fourth and fifth shallow wells 5', 2 not included by the third deep well 4 respectively, a MOS transistor constituting a digital circuit is formed on the surface of the first and second shallow wells 5, 3 to which the digital series power supply is connected and a MOS transistor constituting an analog circuit is formed on the surface of the fourth and fifth shallow wells 5', 2 to which the analog series power supply is connected. As a result, it can be effectively prevented at a low cost for the digital noise of the CMOS integrated circuit mixedly loading the analog and digital circuits from being backfired to the analog circuit.

REFERENCES:
patent: 4907058 (1990-03-01), Sakai
patent: 5146112 (1992-09-01), Ito et al.
"A Bonded-SOI-Wafer CMOS 16-Bit 50-KSPS Delta-Sigma ADC", T. Takaramoto et al., IEEE 1991 Custom Integrated Circuits Conference, pp. 18.1.1-18.1.4.

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