CMOS input circuit

Details CMOS input circuit CMOS input circuit

1994-07-12

1995-10-31

Westin, Edward P.

Electronic digital logic circuitry

Interface

Supply voltage level shifting

326121, H03K 190175

Patent

active

054633303

ABSTRACT:
A CMOS circuit (7) receives the potentials V.sub.CC and V.sub.EE1 from potential points (50 and 52), respectively, to apply an output to the gate of a transistor (3a). The drain of the transistor (3a) is connected through a resistor (4) to a potential point (53) providing the potential V.sub.EE2. The gate of a transistor 6, along with the drain of the transistor (3a), is connected through the resistor (4) to the potential point (53). The gate of a transistor (5) is connected to an input terminal (IN). In this circuit configuration, the time constant of potential drop toward the potential V.sub.EE2 at the gate of the transistor (6) through the resistor (4) is smaller because the gate capacitance of the transistor (5) does not relate thereto, so that a quick potential drop at the gate of the transistor (6) can be achieved.

REFERENCES:
patent: 4469960 (1984-09-01), Raghunathan
patent: 4506164 (1985-03-01), Higuchi
patent: 5225721 (1993-07-01), Gal et al.
patent: 5332934 (1994-07-01), Hashimoto

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