CMOS input buffer stable for the variation of a power supplying

Details CMOS input buffer stable for the variation of a power supplying CMOS input buffer stable for the variation of a power supplying

1988-12-27

1989-12-26

Wong, Peter S.

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

323316, 323317, 307475, 307585, G05F 324

Patent

active

048900516

ABSTRACT:
A CMOS input buffer for converting the TTL level signals to the CMOS level signals, thereby being capable of stably operating within all allowable range of the power supply voltage, is disclosed. Said CMOS input buffer includes an inverter, a reference voltage generating circuit, a power supply voltage tracer circuit and an input circuit. The input circuit includes P-channel MOS transistors and N-channel MOS transistors so as to supply a stable logic output in response to the input signal of TTL level, regardless of variation of the power supply voltage Vcc, under the control of a voltage that is approximately proportional to the difference between the reference voltage and the power supply voltage within a fixed range of the power supply voltage.

REFERENCES:
patent: 4453121 (1984-06-01), Noufer
patent: 4472647 (1984-09-01), Allgood et al.
patent: 4593212 (1986-06-01), Svager
patent: 4677321 (1981-06-01), Bacrania
patent: 4707623 (1987-11-01), Bismarck
patent: 4763022 (1988-08-01), Sheldon

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