CMOS input buffer protection circuit

Details CMOS input buffer protection circuit CMOS input buffer protection circuit

1998-04-28

2000-05-16

Tokar, Michael

Electronic digital logic circuitry

Interface

Current driving

326 80, 326 81, 326 86, 326 30, 326 21, 326 34, H03K 190175, H03K 19094, H03K 19003

Patent

active

060642319

ABSTRACT:
A low voltage CMOS input buffer protection circuit that is used to protect an input buffer from any high voltage signal (e.g., 5 V) that may appear along a signal bus. The protection circuit is also "hot-pluggable", meaning that the protection circuit will not draw any current when not powered (i.e., when VDD is not present). The circuit includes a CMOS transmission gate and utilizes on-chip generated reference voltages to provide the necessary protection.

REFERENCES:
patent: 5764077 (1998-06-01), Andresen et al.
patent: 5828231 (1998-10-01), Bazargan
patent: 5892377 (1999-04-01), Johnston et al.
patent: 5923184 (1999-07-01), Ooms et al.

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