Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-10-11
2003-05-27
Thomas, Tom (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S462000
Reexamination Certificate
active
06570201
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method for fabricating a CMOS image sensor. Particularly, the present invention relates to a CMOS image sensor capable of increasing the punch-through voltage and the charge integration of a photodiode, and a method for forming the same.
BACKGROUND OF THE INVENTION
The CMOS image sensor is a device for converting optical images to electrical signals. That is, it responds to the visible light, and the signal electrons thus formed are converted to voltages. Then the voltages are subjected to a signal processing to reconvert the voltages to image information.
Used for recalling images, the CMOS image sensor is widely applied to cameras, medical equipment, monitoring devices, various industrial apparatuses for locating and sensing, toys, and the like. Such devices are driven with a low voltage, and a single chip is sufficient in most cases. Accordingly, the field of application for these sensors is being gradually expanded.
In the CMOS image sensor, there are formed as many MOS transistors as the number of pixels, and a switching method is adopted in which the outputs are checked one by one.
In the CMOS image sensor, compared with the conventionally and widely used CCD image sensor, the driving method is simple, and diversified scanning methods can be realized while the signal processing circuit can be packed into a single chip. Accordingly, not only can the product be miniaturized, but also a high compatibility can be achieved with the result being reduced manufacturing cost and power consumption.
FIG. 1
is a circuit diagram of a unit pixel of a conventional CMOS image sensor that includes four transistors and two capacitors. That is, there is a photodiode as a photo-sensing means, and four NMOS transistors.
The four NMOS transistors serve the following roles. A transfer transistor Tx carries the photoelectric charges of the photodiode PD to a floating diffusion region. A reset transistor Rx discharges the electric charges from the floating diffusion region so as to make it possible to detect the signals. A drive transistor Dx serves as a source follower, and a select transistor Sx carries out the switching and addressing.
In the drawing, reference code Cf indicates the capacitance of the floating diffusion region, and Cp indicates the capacitance of the photodiode. The image sensor thus constituted operates in the following manner. First, the reset transistor Rx, the transfer transistor Tx and the select transistor Sx are turned on, thereby resetting the unit pixel.
Under this condition, the photodiode PD begins to be depleted, and a carrier-charging occurs in the capacitance Cp, while the capacitance Cf of the floating diffusion region is charge-accumulated up to the supply voltage Vdd. Then the transfer transistor Tx is turned off, and the select transistor Sx remains turned on, while the reset transistor Rx is turned off.
In this operation, an output voltage V
1
is read from a unit pixel output terminal (Out) and stored in a buffer. Then the transfer transistor Tx is turned on, and thus, the carriers of the capacitance Cp, which have been affected by the intensities of the visible light, are moved to the capacitance Cf. An output voltage V
2
is read from the terminal (Out), and the difference between the two voltages (V
1
−V
2
) is converted from an analog data to a digital data, thereby completing an operational cycle of the unit pixel.
Now referring to
FIGS. 2A
to
2
C, the conventional fabrication processes will be described for the transfer transistor, the photodiode and the floating diffusion region of the CMOS image sensor.
First, as shown in
FIG. 2A
, a gate insulating film
22
and a gate electrode
23
are formed on a p-type semiconductor substrate
20
on which a device isolating film
21
has been formed. Further, at one end of the gate electrode
23
and within the semiconductor substrate
20
, there is formed an n type impurity region
24
that will form a photodiode PD.
Then as shown in
FIG. 2B
, an insulating spacer
25
is formed on a side wall of the gate electrode
23
, and a p-type impurity region
26
is formed on the n-type impurity region
24
, thereby completing the formation of the photodiode.
Thereafter, in order to form a floating diffusion region, a photoresist pattern PR is formed by using an ion-implantation mask, and an n-type dopant is ion-implanted, thereby forming a floating diffusion region
27
. Then as shown in
FIG. 2C
, the photoresist pattern PR is removed.
In the above described conventional CMOS image sensor fabricating process, a self-aligning ion-implantation is carried out to forming n-type impurity region of the photodiode by utilizing the gate electrode
23
having the insulating spacer
25
.
Further, the transfer transistor for moving the charges from the photodiode to the floating diffusion region consists of a native NMOS transistor in which the threshold voltage has been adjusted to less than 0 V so as to prevent a voltage drop. The lower portion of the transfer transistor Tx simply consists of a p-type epitaxial layer.
As the size of the chip is reduced, the channel length of the transfer transistor is shortened. Therefore, a punch-through occurs at even a low voltage so as to cause leakage.
Further, when the transfer transistor is turned off, the potential barrier is lowered between the photodiode and the floating diffusion region and, therefore, the charge accumulation amount is decreased in the photodiode during the charge integration. Further, if the self-alignment is not well designed when forming the photodiode region, a process variation may occur.
SUMMARY OF THE INVENTION
The present invention is intended to overcome the above described disadvantages of the conventional technique.
Therefore it is an object of the present invention to provide a CMOS image sensor and a fabricating method therefor, in which the punch-through voltage of a transfer transistor is increased, the potential barrier is heightened between the photodiode and the floating diffusion region during the turn-off of the transfer transistor so as to increase the charge accumulation amount of the photodiode, and the photodiode is formed without resorting to a self-aligning ion-implantation.
In achieving the above object, the CMOS image sensor having a transfer transistor for transferring charges from a photodiode to a floating diffusion region according to the present invention includes a semiconductor substrate; a gate electrode of the transfer transistor, the gate electrode being formed on the semiconductor substrate; a photodiode including a first conduction type first impurity region and a second conduction type second impurity region, the two regions being formed at one end of the gate electrode and within the semiconductor substrate; a floating diffusion region including a second conduction type third impurity region, the third impurity region being formed at another end of the gate electrode and within the semiconductor substrate; and a first conduction type fourth impurity region formed under the gate electrode and within the semiconductor substrate, and isolated from the photodiode and the floating diffusion region.
In another aspect, the present invention includes a method for forming a CMOS image sensor with a transfer transistor included therein for transferring the charges from a photodiode to a floating diffusion region, the method including steps of forming a first conduction type first impurity region in a photodiode-forming region and within a semiconductor substrate; forming a second conduction type second impurity region in a transfer transistor region and within the semiconductor substrate; forming a gate insulating film and a gate electrode of the transfer transistor on the semiconductor substrate, a portion of the gate electrode being overlapped with the second impurity region; forming a second conduction type third impurity region upon the first impurity region and within the semiconductor substrate; and forming a first conduction type floating diffusion region
Gebremariam Samuel A
Hynix / Semiconductor Inc.
Jacobson & Holman PLLC
Thomas Tom
LandOfFree
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