1986-04-28
1988-11-08
James, Andrew J.
357 42, 357 40, H01L 2710
Patent
active
047836920
ABSTRACT:
A semiconductor device in a CMOS gate array in which a basic cell has inputs by the number of n, wherein the basic cell comprises 2n PMOS transistors and 2r NMOS transistors is disclosed. The basic cell comprises, in a same basic cell, MOS transistors having at least two gate electrodes connected in common and MOS transistors operated on one gate electrode, and a logic circuit is formed by transistors of different gate width.
REFERENCES:
patent: 3652906 (1972-03-01), Christensen
patent: 4412237 (1983-10-01), Matsumura et al.
James Andrew J.
Prenty Mark
Sharp Kabushiki Kaisha
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