CMOS dynamic RAM with discrete sense amplifiers and a common sen

Details CMOS dynamic RAM with discrete sense amplifiers and a common sen CMOS dynamic RAM with discrete sense amplifiers and a common sen

1990-12-24

1992-10-27

Kunemund, Robert

Fishing, trapping, and vermin destroying

437 48, 437 52, H01L 21265, H01L 2170

Patent

active

051594153

ABSTRACT:
A method for making a sense amplifier capable of achieving high-speed sensing operation as well as incurring less influence from electrostatic capacitance of bit lines in a high-integration semiconductor memory (DRAM) device is disclosed. The DRAM device includes a plurality of word line pairs and bit line pairs, and a plurality of memory cell arrays with a plurality of memory cells, and further includes discrete sense amplifier circuits connected to each of the memory cell arrays, common sense amplifier circuits coupled between the discrete sense amplifiers, and separation circuits controlled by a given control signal and connected between the discrete sense amplifier circuits and common sense amplifier circuits.

REFERENCES:
patent: 4404660 (1983-09-01), Menachem
patent: 4584672 (1986-04-01), Schutz et al.
patent: 4636982 (1987-01-01), Takemae et al.
patent: 4733374 (1988-03-01), Furuyama et al.
patent: 4799197 (1989-01-01), Kodama et al.
patent: 4931994 (1990-06-01), Matsui et al.

Affiliated with

Also associated with

Rating

CMOS dynamic RAM with discrete sense amplifiers and a common sen does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with CMOS dynamic RAM with discrete sense amplifiers and a common sen, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and CMOS dynamic RAM with discrete sense amplifiers and a common sen will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-909111