CMOS driver circuit for providing a logic function while reducin

Details CMOS driver circuit for providing a logic function while reducin CMOS driver circuit for providing a logic function while reducin

1998-04-21

2000-02-15

Tokar, Michael

Electronic digital logic circuitry

Interface

Current driving

326 83, 326 27, 326121, 326 93, 326 98, 326 28, 326119, H03K 1716, H03K 19094, H03K 1900, H03K 19096, H03K 1920

Patent

active

060257393

ABSTRACT:
A CMOS driver circuit minimizes a pass-through current flowing from a first voltage terminal to a second voltage terminal during transitions of an input signal. At least two transistors are connected in series between two voltage terminals. One transistor turns off when the input signal transitions from a low logic state to a high logic state. Another transistor turns off when the input signal transitions high-to-low. During either input signal transition, one of the transistors is off, thereby cutting the path between the voltage terminals to reduce or eliminate the pass-through current. The two transistors are controlled by the output of the circuit through a feedback loop. This feedback loop can include a delay element, one transistor controlled by a single synchronizing clock signal, or two transistors controlled by two complementary clock signals. The driver circuit can be used as a building block to provide conventional combination logic functions. Specific embodiments for an inverter and a NOR gate are described.

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