Coded data generation or conversion – Converter compensation – Temperature compensation
Patent
1987-06-15
1989-01-24
Shoop, Jr., William M.
Coded data generation or conversion
Converter compensation
Temperature compensation
307310, 307491, 341136, 341154, H03M 106
Patent
active
048003654
ABSTRACT:
A CMOS digital-to-analog converter includes a modified R-2R resistive ladder network connected to 16 pairs of bit switches responsive to the various digital inputs to produce an internal analog voltage representative of the digital input. Each pair of bit switches includes an N-channel MOSFET and a P-channel MOSFET. The on resistance of the P-channel MOSFET is adjusted to precisely match that of the N-channel MOSFET by driving the gate of each P-channel MOSFET with the output of a CMOS inverter referenced between V.sub.CC and a reference voltage that is adjusted to cause the on resistances of a P-channel "monitor" MOSFET and an N-channel "monitor" MOSFET to be equal. A reference voltage is generated by a circuit that generates a temperature-invariant source current from a V.sub.BE difference between first and second transistors, causes part of it to flow through first, second, and third resistors, the third resistor having a voltage across it established by the V.sub.BE voltage of a transistor and having a predetermined negative temperature coefficient, the second and third resistors being composed of nichrome, the first resistor being lightly doped P-type material the resistance of which has a positive temperature coefficient.
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Highton Frederick J.
Ito Kazuo
Miller Gary L.
White Robert L.
Blum Richard K.
Burr-Brown Corporation
Shoop Jr. William M.
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