CMOS device with asymmetric gate strain

Details CMOS device with asymmetric gate strain CMOS device with asymmetric gate strain

2005-12-22

2010-02-02

Warren, Matthew E (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Mosfet type gate sidewall insulating spacer

C257S346000, C257S389000, C257SE29134, C257SE29150

Reexamination Certificate

active

07656049

ABSTRACT:
The use of strained gate electrodes in integrated circuits results in a transistor having improved carrier mobility, improved drive characteristics, and reduced source drain junction leakage. The gate electrode strain is obtained through non symmetric placement of stress inducing structures as part of the gate electrode. Silicon nitride layers may be placed on one side of the gate electrode in a compressive mode, or on the other side of the gate electrode in a tensile mode to obtain similar results.

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