CMOS device and process

Details CMOS device and process CMOS device and process

1992-10-08

1993-12-07

Wojciechowicz, Edward

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

257371, 257377, 257384, 257412, 257741, 257751, 257754, 257915, H01L 2702

Patent

active

052685900

ABSTRACT:
A CMOS device and a method for its fabrication are disclosed. In one embodiment the CMOS device includes an NMOS transistor and a PMOS transistor each of which has silicided source and drain regions and a silicon gate electrode which includes a titanium nitride barrier layer. The NMOS transistor and PMOS transistors are coupled together by a silicon layer which is capped by a layer of titanium nitride barrier material. The source and drain regions are silicided with cobalt or other metal silicide which is prevented from reacting with the silicon gate electrode and interconnect by the presence of the titanium nitride barrier layer.

REFERENCES:
patent: 4920073 (1990-04-01), Wei et al.
patent: 4923822 (1990-05-01), Wang et al.

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