CMOS device and method of manufacturing same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C438S199000, C257SE27062

Reexamination Certificate

active

07663192

ABSTRACT:
A CMOS device includes NMOS (110) and PMOS (130) transistors, each of which include a gate electrode (111, 131) and a gate insulator (112, 132) that defines a gate insulator plane (150, 170). The transistors each further include source/drain regions (113/114, 133/134) having a first portion (115, 135) below the gate insulator plane and a second portion (116, 136) above the gate insulator plane, and an electrically insulating material (117). The NMOS transistor further includes a blocking layer (121) having a portion (122) between the gate electrode and a source contact (118) and a portion (123) between the gate electrode and a drain contact (119). The PMOS transistor further includes a blocking layer (141) having a portion (142) between the source region and the insulating material and a portion (143) between the drain region and the insulating material.

REFERENCES:
patent: 2008/0048261 (2008-02-01), Morikado
patent: 2008/0203477 (2008-08-01), Yamazaki et al.
patent: 2009/0001468 (2009-01-01), Shin
patent: 2009/0039434 (2009-02-01), Doris et al.
patent: 2009/0108350 (2009-04-01), Cai et al.
patent: 2009/0146211 (2009-06-01), Cote et al.

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