CMOS bus driver circuit

Details CMOS bus driver circuit CMOS bus driver circuit

2001-06-21

2002-06-25

Tokar, Michael (Department: 2819)

Electronic digital logic circuitry

Interface

Supply voltage level shifting

C326S068000, C326S083000, C326S057000

Reexamination Certificate

active

06411125

ABSTRACT:

FIELD OF THE INVENTION
The invention generally relates to bus driver circuits and more specifically to a CMOS bus driver circuit.
BACKGROUND OF THE INVENTION
It is usual in integrated circuits to interconnect circuit units or also integrated circuits as a whole via a bus, a driver circuit being used as each stage coupling the circuit units and the bus. In modern integrated circuits these driver circuits are configured as CMOS driver circuits in which both the input stage and the output stage consist of two complementary MOS transistors connected in series. This means that in the output stage the source-drain path of a PMOS transistor and the source-drain path of an NMOS transistor are connected in series between a supply voltage terminal and a ground terminal, the connection of the two source-drain paths forming the circuit output. Since a variety of driver circuits are connected to the bus it may result in actual practice that a voltage occurs at the circuit output of a bus driver which is higher than the supply voltage of such a bus driver, this being especially the case when circuit units of several integrated circuit modules or integrated circuits each designed for a differing supply voltage are connected to a bus. Thus, it may happen that a driver applies to the bus a signal whose voltage value is higher than the supply voltage of another driver likewise connected to the bus.
In integrated circuits the PMOS transistor of the output stage is as a rule an enhancement-type transistor in which the gate voltage always needs to be the highest voltage existing in the circuit so that this transistor can be switched OFF. Should it happen, however, that the drain of this transistor receive from the bus a voltage which is higher than the supply voltage of the driver, then voltage is available to permit switching the PMOS transistor OFF by being applied to the gate. Indeed, the ON condition of the PMOS transistor materializing in this case could even result in it being ruined.
SUMMARY OF THE INVENTION
The invention is thus based on the objective of providing a CMOS bus driver circuit of the aforementioned kind which at modest circuit expense is protected should a voltage be applied to the circuit output which is higher than the available supply voltage.
In an embodiment of the invention, a circuit output and the gate of a MOS transistor of the output stage the gate-source path of a further MOS transistor of the same channel type is connected whose gate is connected to the supply voltage terminal, that in the connection of the source-drain paths of the MOS transistors of the input stage a diode is inserted so that the flow of a current in the direction of the MOS transistor connected to the supply voltage terminal of the input stage is blocked, its cathode being connected to the gate of the one MOS transistor of the output stage, and that a blocking circuit component is provided which sets the output stage into a high impedance state when the driver circuit is not supplied with an enable signal for bus driving.


REFERENCES:
patent: 5338978 (1994-08-01), Larsen et al.
patent: 5600267 (1997-02-01), Wong et al.

Affiliated with

Also associated with

Rating

CMOS bus driver circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with CMOS bus driver circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and CMOS bus driver circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2962807