CMOS buffer circuits and integrated circuits using the same

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

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C326S086000

Reexamination Certificate

active

11217344

ABSTRACT:
CMOS buffer circuits with reduced short circuit current. In the CMOS buffer circuit, an output stage drives an output terminal and comprises a first output transistor of a first conductive type and a second output transistor of a second conductive type. An output driving unit produces a first signal to turn off the first output transistor according to a delay signal. A bidirectional delay unit is controlled by the input signal to turn on the second output transistor after the first output transistor be turned off. In the bidirectional delay unit, a bidirectional logic unit generates two logic signals according to an inversion signal of the input signal, first and second bidirectional buffers are coupled to the output driving unit, generating a second signal to turn on the second output transistor according to the input signal and the two logic signals.

REFERENCES:
patent: 5317206 (1994-05-01), Hanibuchi et al.
patent: 5623216 (1997-04-01), Penza et al.
patent: 6686773 (2004-02-01), Dash et al.

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