Clocked state devices including master-slave terminal...

Details Clocked state devices including master-slave terminal... Clocked state devices including master-slave terminal...

2007-11-27

2007-11-27

Lam, Tuan T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

C327S201000, C327S211000, C327S212000, C327S218000

Reexamination Certificate

active

11194272

ABSTRACT:
A clocked state circuit can include a transmission gate configured to clock an output of a master terminal to an input of a slave terminal responsive to a clock signal or a delayed clock signal coupled to the transmission gate.

REFERENCES:
patent: 3697775 (1972-10-01), Kane
patent: 5317205 (1994-05-01), Sato
patent: 5656962 (1997-08-01), Banik
patent: 5767716 (1998-06-01), Ko
patent: 6002284 (1999-12-01), Hill et al.
patent: 6204707 (2001-03-01), Hamada et al.
patent: 6677795 (2004-01-01), Itoh
patent: 6803799 (2004-10-01), Churchill et al.
patent: 6864733 (2005-03-01), Anshumali et al.
patent: 6975152 (2005-12-01), Lapidus
patent: 7129762 (2006-10-01), Vadi
patent: 2004/0051574 (2004-03-01), Ko et al.
patent: 11-330917 (1999-11-01), None
patent: 2004-017948 (2004-03-01), None

Affiliated with

Also associated with

Rating

Clocked state devices including master-slave terminal... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Clocked state devices including master-slave terminal..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Clocked state devices including master-slave terminal... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3832165